Perun Processing Platform

Perun Processing Platform is a reconfigurable system on module solution for nanosatellites. Perun Processing Platform comes in an application-agnostic plug card design, which can be used as the main on-board processor as well as a payload processor. Perun Processing Platform is designed based on an SEU immune FPGA System on Chip (SoC) with Arm Cortex M3. the processing platform has many data storage options including Flash memory and SEU immune MRAM. Additionally, the power architecture for the processing platform is protected from SEL events.

Unique FPGA SoC architecture enables reconfigurable communication interfaces and GPIOs based on system requirements and avoids hardware obsolescence due to changing engineering requirements throughout missions.

In-orbit re-programmability of the Perun processor enables the ability to rectify hardware/software faults during missions. Additionally, the feature enables the utilization of different firmware based on mission stages and power requirements. Development board for Perun Processing Platform can be used to start software and firmware applications immediately.

Specifications
Mass:
21 g
Dimensions:
55.0 x 40.0 x 5.5 mm
Random Access Memory:
4 Mbit
Storage:
1 Gbit (Flash)
Input Voltage:
5V to 18V
Typical Power Consumption:
0.5 W (@ 5V)
Operating Temperature Range:
-40C to 100C
Interface:
UART
Interface:
I2C
Interface:
SPI
Interface:
LVDS
Interface:
CAN
Interface:
USB ULPI
Operating System:
FreeRTOS
Interface:
Configurable GPIOs (3v3 & 2V5)
Documents